This invention relates to a control apparatus for an elevator. More particularly, it relates to a control apparatus for an elevator in which the cage of the elevator is safely operated even when a drastic change has arisen in a reference speed command signal, a cage speed signal or a controlled variable based on these signals.
In recent years, with the advancements of microelectronics technology and power electronics technology, there have appeared elevator control apparatuses constructed of microcomputers and semiconductor devices, such as thyristors, which make the most use of these technologies. For example, the official gazette of Japanese Patent Application Laid-open No. 223771/1985 discloses an elevator control apparatus employing two microcomputers.
FIG. 8 shows the schematic construction of the whole elevator equipped with the prior-art elevator control apparatus. Referring to the figure, numeral 1 designates a cage, numeral 2 a counterweight, and numeral 3 a rope which is wound round a sheave 4 and which has the cage 1 coupled to one end thereof and the counterweight 2 coupled to the other end thereof. Numeral 5 indicates an induction motor which drives the sheave 4, numeral 6 a pulse generator which generates pulses proportional to the movement distance of the cage 1 on the basis of the rotation of the motor 5, numeral 7 a counter circuit which counts the pulses from the pulse generator 6, numeral 8 a microcomputer system which receives a cage speed signal 7a delivered from the counter circuit 7 and controls the speed of the cage, numeral 9 a three-phase A.C. power source, and numeral 10 a power converter by which three-phase alternating currents are converted into electric power suitable for the speed control of the cage and to which a command signal 8a from the microcomputer system 8 is applied, threby to control the torque and r.p.m. of the motor 5.
FIG. 9 shows the details of the microcomputer system 8 mentioned above. This system consists of first and second microcomputers 80 and 90. The first microcomputer 80 is constructed of a CPU 81, and a ROM 83, a RAM 84, an input port 85 and an output port 86 which are connected to the CPU 81 through a bus 82. The input port 85 is supplied with the cage speed signal 7a (V.sub.T) from the counter circuit 7. This microcomputer 80 has the functions of supervising the service of the cage 1, controlling a door, processing cage calls and hall calls, and generating a reference speed command signal V.sub.N.
The second microcomputer 90 is constructed of a CPU 91 which is connected to the CPU 81 of the first microcomputer 80 through a transmission interface 100, and a ROM 93, an input port 95 and an output port 96 which are connected to the CPU 91 through a bus 92. The input port 95 is supplied with the cage speed signal 7a (V.sub.T) from the counter circuit 7. The second microcomputer 90 has the function of controlling the speed of the cage, and it receives the reference speed command signal V.sub.N generated by the first microcomputer 80, as a transmitted reference speed command signal V.sub.P through the transmission interface 100. Then, it determines the deviation between the transmitted signal V.sub.P and the cage speed signal 7a (V.sub.T) and executes a phase compensation and a gain compensation so as to finally deliver a torque command T.sub.M to the power converter 10. Thus, the motor 5 is controlled, and the cage 1 is smoothly subjected to a series of operations consisting of start, acceleration, constant-speed run, deceleration and floor arrival.
By way of example, Product 8085A manufactured by Intel Inc. is utilized as the CPU, and Product 8212 similarly manufactured by Intel Inc. is utilized as the transmission interface.
In the prior-art elevator control apparatus as described above, no measure is taken against the malfunction of the transmission interface 100, and hence, problems to be stated below are involved. When an LSI constructing the transmission interface 100 causes the malfunction, any bit lacks or a specified bit becomes "1" in the transmitted reference speed command signal V.sub.P which has been transmitted from the first microcomputer 80 to the second microcomputer 90 through the transmission interface 100, and the transmitted signal V.sub.P becomes different from the original reference speed command signal V.sub.N.
This situation will be explained with reference to FIG. 10. When the transmission interface 100 is functioning normally, V.sub.N =V.sub.P holds. However, when any fault occurs in the transmission interface 100 at a time t.sub.1 and the specified bit of the signal V.sub.P lacks, V.sub.P &lt;V.sub.N holds as seen from FIG. 10. Then, the cage might be rapidly decelerated to endanger passengers. Besides, when the degree of deceleration is high, the rope wound round the sheave can slip to damage the equipment.
Moreover, if "1" is erected for the specified bit of the transmission interface 100, the cage is rapidly accelerated contrariwise to the above. In addition, similar problems might occur when the transmission interface 100 operates erroneously due to noise or a power source surge.